Detail IEEE Transactions on Neural Networks vol. 14 no. 5 (2003) Bibliografi Topik: TECHNOLOGY Bahasa: (EN )    ISSN: 1045-9227    Year:: 2003     Penerbit: IEEE Computational Intelligence Society Jenis: Journal - ilmiah internasional [Lihat daftar eksemplar jurnal IEEE Transactions on Neural Networks] Ketersediaan Perpustakaan Pusat (Semanggi) Nomor Panggil: II36.9 Non-tandon: 1 (dapat dipinjam: 0) Tandon: tidak ada     Lihat Detail Induk Artikel dalam koleksi ini Synaptic Plasticity in Spiking Neural Networks (SP2INN) : A System Approach, halaman 980-992 A Digital Architecture for Support Vector Machines : Theory, Algorithm, and FPGA Implementation, halaman 993-1009 Fast Triggering in High-Energy Physics Experiments Using Hardware Neural Networks, halaman 1010-1027 A Digital Hardware-Pulse-Mode Neuron With Piecewise Linear Activation Function, halaman 1028-1037 FPGA Implementation of ICA Algorithm for Blind Signal Separation and Adaptive Noise Canceling, halaman 1038-1046 Implementation of Adaptive Critic-Based Neurocontrollers for Turbogenerators in a Multimachine Power System, halaman 1047-1064 DSP-Based Hierarchical Neural Network Modulation Signal Classification, halaman 1065-1071 Digital Implementation of Hierarchical Vector Quantization, halaman 1072-1084 IP Core Implementation of A Self-Organizing Neural Network, halaman 1085-1096 A Compact 3-D VLSI Classifier Using Bagging Threshold Network Ensembles, halaman 1097-1109 A Massively Parallel Architecture for Self-Organizing Feature Maps, halaman 1110-1121 Implementation of A New Neurochip Using Stochastic Logic, halaman 1122-1127 Design and Implementation of A Random Neural Network Routing Engine, halaman 1128-1143 An Image Representation Algorithm Compatible With Neural-Associative-Processor-Based Hardware Recognition Systems, halaman 1144-1161 Implementation of An RBF Neural Network on Embedded Systems : Real-Time Face Tracking and Identity Verification, halaman 1162-1175 A New Wide Range Euclidean Distance Circuit for Neural Network Ijardware Implementations, halaman 1176-1186 Analog Implementation of ANN With Inherent Quadratic Nonlinearity of The Synapses, halaman 1187-1200 Analog Recugent Decision Circuit With High Signal-Voltage Symmetry and Delay-Time Equality to Improve Continuous-Time Convergence Performance, halaman 1201-1206 Compact Low-Power Calibration Mini-DACs for Neural Arrays With Programmable Weights, halaman 1207-1216 VLSI Implementations of Threshold Logic - A Comprehensive Survey, halaman 1217-1243 Real-Time Reconfigurable Linear Threshold Elements Implemented in Floating-gate CMOS, halaman 1244-1256 Analog Soft-Pattern-Matching Classifier Using Floating-Gate MOS Technology, halaman 1257-1265 A Comparative Study of Access Topologies for Chip-Level Address-Event Communication Channels, halaman 1266-1277 Scene Segmentation Using Neuromorphic Oscillatory Networks, halaman 1278-1296 A VLSI Recurrent Network of Integrate-and-Fire Neurons Connected By Plastic Synapses With Long-Term Memory, halaman 1297-1307 A Subthreshold MOS Neuron Circuit Based on the Volterra System, halaman 1308-1312 A Bio-Inspired Two-Layer Mixed-Signal Flexible Programmable Chip for Early Vision, halaman 1313-1336 Log-Domain Implementation of Complex Dynamics Reaction-Diffusion Neural Networks, halaman 1337-1355 An Analog CMOS Central Pattern Generatorfor Interlimb Coordination in Quadruped Locomotion, halaman 1356-1365 0.8 pm CMOS Implementation of Weighted-Order Statistic Image Filter Based on Cellular Neural NetworkArchitecture, halaman 1366-1374 Neuro-Fuzzy Chip to Handle Complex Tasks With Analog Performance, halaman 1375-1392 Neuron-Synapse IC Chip-set for Large-Scale Chaotic Neural Networks, halaman 1393-1404 An Analog VLSI Chip Emulating Sustained and Transient Response Channels of The Vertebrate Retina, halaman 1405-1412 Analog and Digital FPGA Implementation of BRIN for Optimization Problems, halaman 1413-1425 Kerneltron : Support Vector "Machine" in Silicon, halaman 1426-1434  Edit Artikel Lihat Sejarah Pengadaan  Konversi Metadata   Kembali

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