Detail A 13.56-MHz Passive NFC Tag IC in 0.18-µm CMOS Process for Biomedical Applications   Oleh:  Chi-Huan Lu ; Ji-An Li ; Tsung-Hsien Lin Jenis: Article from Proceeding Dalam koleksi: 2016 International Symposium on VLSI Design, Automation and Test (VLSI-DAT) 25-27 April 2016 (ada di IEEE Explore), page 1-4. Fulltext: 07482521.pdf (1.64MB) Isi artikel This paper presents a low power and area-efficient passive tag IC for biomedical applications. CMOS gate cross-coupled rectifier with a diode is built to achieve high power conversion efficiency without redundant control circuits. The demodulator adopts the adaptive threshold generation technique to detect the small RF envelope changes on 10% ASK signals. Inverter-based clock generator consumes only few µW to provide high precision clock for load modulation. This tag IC is fabricated in a 0.18-µm CMOS process. Total power consumption for analog block is 67.7µW under a 1.8-V supply and the chip size is 0.68 mm2 . Opini Anda Klik untuk menuliskan opini Anda tentang koleksi ini! Kembali

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