RISC Processor NICCOLO32 Design and Interfacing System with UART and RTC based on Advanced Microcontroller Bus Architecture (AMBA)  

Oleh:

Sereati, Catherine Olivia ; Bachri, Karel Octavianus

Jenis: Article from Conference Paper
Dalam koleksi: The 12th International Conference On QiR (Quality in Research) in Conjunction with ICSERA 2011 : Program Book Volume 1, Bali, 4-7 July 2011, page abstract.
Topik: RISC; AMBA; RTC; UART; NICCOL032; ModelSim 6.0
Fulltext: QIR2011 B9-2.pdf (1.11MB)

Isi artikel

Nowadays, RISC (Reduced Instruction Set Computer) architecture processor is recently used in multimedia. telecommunication, and household application This paper propose how to design a processor based on RISC (Reduced Instruction Set Computer) archilecture. NICCOLO 32 is a RISC processor with SPARC V8 architecture. Designing process including how to make its interface system and how to design its peripherals. This level of design requires bus systems which have high performance and low power consumption to support an system interface between RISC Processor and its peripherals. In order to solve that problem, AMBA (Advanced Microcontroller Bus Architecture) is used to support interface system betM'een processor and another component or peripheral in SoC level design. The design process started by designing NICCOLO 32 as processor. AMBA as its interfacing system and then continuing with UART (Universal Asynchronous Receiver Transmitter) and RTC (Real Time Clock) as its peripheral. This system is design and simulated using ModelSim 6.0. The simulation result show that this system is work at 180MHz and enable to operate in single transfer mode, where one cycle of AMBA could only acces one data packet of one address.

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