Speeding Up Architectural Simulations For High-Performance Processors  

Oleh:

Eeckhout, Lieven ; Bosschere, Koen De

Jenis: Article from Journal - ilmiah internasional
Dalam koleksi: Simulation vol. 80 no. 9 (Sep. 2004), page 451-468.
Topik: Computer architecture; architectural design; statistical simulation; trace sampling; reduced input sets
Fulltext: 451.pdf (211.6KB)

Isi artikel

Designing a high-performance microprocessor is extremely time-consuming, taking at least several years. In this article, the authors discuss these issues and propose a solution for each of them. As such, they present a new simulation methodology for designing high-performance microprocessors by combining several recently proposed techniques, such as statistical simulation, representative workload design, trace sampling, and reduced input sets. The major contribution of this study is to present a holistic view on speeding up the architectural design phase in which the above-mentioned techniques are integrated in one single architectural design framework. In this methodology, the authors first identify a region of interest in the huge design space through statistical simulation. As such, the authors conclude that this methodology can reduce the total simulation time considerably. In addition to presenting this new architectural modeling and simulation approach, a survey of related work of this fast-growing research field is presented.

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