Competitive Learning With Floating-Gate Circuits  

Oleh:

Diorio, C. ; Figueroa, M. ; Hsu, D.

Jenis: Article from Journal - ilmiah internasional
Dalam koleksi: IEEE Transactions on Neural Networks vol. 13 no. 3 (2002), page 732-744.
Topik: circuits; competitive learning; floating - gate; circuits

Ketersediaan

Perpustakaan Pusat (Semanggi) Nomor Panggil: II36.6 Non-tandon: 1 (dapat dipinjam: 0) Tandon: tidak ada

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Isi artikel

Competitive learning is a general technique for training clustering and classification networks. We have developed an 11 - transistor silicon circuit, that we term an automaximizing bump circuit, that uses silicon physics to naturally implement a similarity computation, local adaptation, simultaneous adaptation and computation and nonvolatile storage. This circuit is an ideal building block for constructing competitive - learning networks. We illustrate the adaptive nature of the automaximizing bump in two ways. First, we demonstrate a silicon competitive - learning circuit that clusters one - dimensional (1 - D) data. We then illustrate a general architecture based on the automaximizing bump circuit ; we show the effectiveness of this architecture, via software simulation, on a general clustering task. We corroborate our analysis with experimental data from circuits fabricated in a 0.35 - µm CMOS process.

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