Digitally Programmable Analog Blocks for The Implementation of Artificial Neural Networks  

Oleh:

Almeida, A.P. ; Franca, J. E.

Jenis: Article from Journal - ilmiah internasional
Dalam koleksi: IEEE Transactions on Neural Networks vol. 7 no. 2 (1996), page 506-514.
Topik: neural network; digitally; programmable; analog blocks; artificial; neural networks

Ketersediaan

Perpustakaan Pusat (Semanggi) Nomor Panggil: II36.1 Non-tandon: 1 (dapat dipinjam: 0) Tandon: tidak ada

Lihat Detail Induk

Isi artikel

This paper describes the design, experimental characterization and behavior modeling of a homogeneous set of building blocks necessary to construct in analog hardware feed - forward artificial neural networks. A novel synapse architecture is proposed using a quasi - passive D / A (digital - to - analog) converter followed by a four-quadrant analog - digital multiplier, its main advantages are : 1) increased signal input range ; 2) improved area/weight resolution ratio ; 3) on - chip refreshing of the weight value ; and 4) serial loading the weight bits. The neurons are built using MOS (metal - oxide semiconductor) transistors operating in the saturation region and exploiting the inherent quadratic characteristics. Experimental results obtained from a demonstration prototype chip realized in a 1.2 µm double - poly, double - metal CMOS (complimentary MOS) technology show good agreement with the design specifications. A simple application of the proposed building blocks is illustrated based on the mixed - signal simulation of the corresponding behavior models constructed from the experimental characterization data.

Opini Anda

Klik untuk menuliskan opini Anda tentang koleksi ini!

Kembali