An ARTI Microchip and Its Use in MulTi-ART1 Systems  

Oleh:

Serrano-Gotarrdeona, T. ; Linares-Barranco, B.

Jenis: Article from Journal - ilmiah internasional
Dalam koleksi: IEEE Transactions on Neural Networks vol. 8 no. 5 (1997), page 1184-1194.
Topik: Micro data; ARTI; microchip; multi; ART1 systems

Ketersediaan

Perpustakaan Pusat (Semanggi) Nomor Panggil: II36.2 Non-tandon: 1 (dapat dipinjam: 0) Tandon: tidak ada

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Isi artikel

Recently, a real - time clustering microchip neural engine based on the ART1 architecture has been reported. However, that chip rendered an extremely high silicon area consumption of 1 cm2, and consequently an extremely low yield of 6 %. Redundant circuit techniques can be introduced to improve yield performance at the cost of further increasing chip size. In this paper we present an improved ART1 chip prototype based on a different approach to implement the most area consuming circuit elements of the first prototype: an array of several thousand current sources which have to match within a precision of around 1 %. Such achievement was possible after a careful transistor mismatch characterization of the fabrication process (ES2 - 1.0 µm CMOS). A new prototype chip has been fabricated which can cluster 50 - b input patterns into up to ten categories. The chip has 15 times less area, shows a yield performance of 98 %, and presents the same precision and speed than the previous prototype. Due to its higher robustness multichip systems are easily assembled. As a demonstration we show results of a two - chip ART1 system, and of an ARTMAP system made of two ART1 chips and an extra interfacing chip.

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