Analog Soft-Pattern-Matching Classifier Using Floating-Gate MOS Technology  

Oleh:

Yamasaki, T. ; Shibata, T.

Jenis: Article from Journal - ilmiah internasional
Dalam koleksi: IEEE Transactions on Neural Networks vol. 14 no. 5 (2003), page 1257-1265.
Topik: analog computer; analog; soft - pattern - matching; floating - gate; MOS technology

Ketersediaan

Perpustakaan Pusat (Semanggi) Nomor Panggil: II36.9 Non-tandon: 1 (dapat dipinjam: 0) Tandon: tidak ada

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Isi artikel

A flexible analog pattern - matching classifier has been developed and its performance is demonstrated in conjunction with a robust image representation algorithm called projected principal - edge distribution (PPED). In the circuit, the functional form of matching is made tunable in terms of the peak position, the peak height and the sharpness of the similarity evaluation by employing the floating - gate MOS technology. The test chip was fabricated in a 0.6 - µm complimentary metal - oxide semiconductor technology and successfully applied to the recognition of simple handwritten patterns and Arabic numerals using the PPED algorithm for robust image coding. The separation and classification of overlapping patterns have been also experimentally demonstrated.

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