Detail DAC linearity improvement algorithm with unit cell sorting based on magic square   Oleh:  Masashi Higashino ; Shaiful Nizam Mohyar ; Kobayashi, Haruo Jenis: Article from Proceeding Dalam koleksi: 2016 International Symposium on VLSI Design, Automation and Test (VLSI-DAT) 25-27 April 2016 (ada di IEEE Explore), page 1-4. Fulltext: 07482526.pdf (494.63KB) Isi artikel This paper proposes a switching algorithm using magic square properties to improve the linearity of a unary DAC by canceling random and systematic mismatch effects among unit current (or capacitor) cells. Simulation results and discussions are provided for DAC linearity comparison in case that the proposed magic square and conventional algorithms are used. Opini Anda Klik untuk menuliskan opini Anda tentang koleksi ini! Kembali

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