This research is concerned with the design process of 32-BIT ALU integrated circuit. The designed integrated circuit implements arithmetic and logical operations in a microprocessor. The design process is done using top-down design methode. It starts from the top level, behavioural level, then structural level, and finally geometric level.
The arithmetic and logic unit design is intended to be implemented in the data path of a high performance processor. This kind of processor needs arithmetic and logic unit (ALU) having minimal processing time during its operation.
High-speed execution of ALU is achieved through full custom mask layout design and careful selection of : algorithm, architecture, IC processing technology, proper transistor dimension (transistor sizing), and full custom layout.
The main building block of an ALU is the adder, so we should select the best adder. An evaluation of adder algorithm and architectures is done.
There are many IC processing technology; bipolar, Metal Oxide Semiconductor (MOS), and BiCMOS. The size of a transistor influences its load capacity and its speed. We can control the transistor dimension in full custom layout design.
There are several possibilities to combine many alternatives described above. It is the task of this research to get the best combination.
We decide to use Brent-Kung Parallel Adder Algorithm, pipeline architecture, CMOS technology, ORBIT Semiconductor Inc foundry, and fully customized layout design.
As a final result, the research produces mask layout spesification of a High Speed 32-BIT ALU circuit. Then the mask layout can be combined with the other sub-system mask layout spesification in a complette microprocessor for being processed in the foundry. |